GERBANG LOGIKA GERBANG LOGIKA Gerbang-gerbang logika merupakan dasar untuk merancang dan membangun rangkaian elektronika digital. Suatu gerbang logika mempunyai satu terminal keluaran dan satu atau lebih terminal masukan. Keluaran dan masukan gerbang logika ini dinyatakan dalam kondisi HIGH (1) atau LOW (0). Agar mahasiswa dapat mengetahui konsep dasar rangkaian gerbang logika dasar. Namun saya akan mencoba membuktikannya menggunakan software Electronics Work Bench atau silakan download versi terbarunya yaitu Multisim. (lihat di tabel simulasi)' Hii Mahadewi, Oke, lain waktu akan saya tunjukan cara menggunakan aplikasi EWB untuk merangkai. Dec 15, 2014 Software simulasi untuk membuat rangkaian gerbang logika. Multimedia Logic 1.6.1; Software untuk mendesign rangkaian gerbang logika. Logisim Win 2.7.1. Gerbang Logika NOR (Lanjutan) Gerbang logika NOR gerbang logika yang memiliki dua atau lebih sinyal masukan dgn satu sinyal keluaran. Berlaku ketentuan: sinyal keluaran akan rendah jika salah satu atau semua sinyal masukan tinggi. Ekspresi Booleannya.
FATCHUR ROHMAN, MOHAMAD (2008) SIMULASI GERBANG LOGIKA MENGGUNAKAN BAHASA PEMROGRAMAN BORLAND DELPHI 7.0. Undergraduate thesis, Department of Physics, Diponegoro University.
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Abstract
Simulasi Gerbang Logika
The application program of logic gate simulation with 8 input variables has been made successfully using Programming Language of Borland Delphi 7.0. Theresult of digital logic combination operation was appeared quickly and definitely in high-low (1 and 0) binary logic sequences. This system can be divided into three big group which done at one Main Program Unit, consists of; input variation, process, and reset procedure. Inputwas given by typing logic operation at TEdit component, processing by clicking TBitBtn component and the result will be showed at TMemo component automatically in 1 and 0 binary sequences. The application software which was yielded consists of 8 input variable (A,B, C, D, E, F, G, and H), and three kinds of digital operator with priority sequences of logic operation degree; not (negative, '), and (dot, .), then or (plus, +).
Item Type: | Thesis (Undergraduate) |
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Subjects: | Q Science > QC Physics |
Divisions: | Faculty of Science and Mathematics > Diploma in Instrumentasi and Electronics Faculty of Science and Mathematics > Department of Physics |
ID Code: | 6098 |
Deposited By: | Ms. Wien Admin |
Deposited On: | 29 Jan 2010 13:09 |
Last Modified: | 12 Nov 2010 10:59 |
Materi Gerbang Logika
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